verilator 5.046-1
| Architecture: | x86_64 |
|---|---|
| Repository: | Extra |
| Description: | The fastest free Verilog HDL simulator |
| Upstream URL: | https://www.veripool.org/verilator/ |
| License(s): | Artistic-2.0, LGPL-3.0-only |
| Maintainers: |
Felix Yan Filipe Laíns |
| Package Size: | 5.9 MB |
| Installed Size: | 26.5 MB |
| Last Packager: | Felix Yan |
| Build Date: | 2026-03-14 17:59 UTC |
| Signed By: | Felix Yan |
| Signature Date: | 2026-03-14 18:03 UTC |
| Last Updated: | 2026-03-14 18:04 UTC |